Si4455
3. Functional Description
SDN
GPIO3
Rx Chain
Synthesizer
GPIO2
XIN XOUT
25-32MHz XO
nSEL
RXp
RXn
LNA
PGA
ADC
Rx/Tx
Modem
SDI
SDO
SCLK
nIRQ
Battery
TX
PA
Voltage
Aux ADC
GPIO1
Sensor
VDD
GPIO0
Figure 2. Si4455 Functional Block Diagram
The Si4455 is an easy-to-use, size efficient, low current wireless ISM transceiver that covers the sub-GHz bands.
The wide operating voltage range of 1.8–3.6 V and low current consumption make the Si4455 an ideal solution for
battery powered applications. The Si4455 operates as a time division duplexing (TDD) transceiver where the
device alternately transmits and receives data packets. The device uses a single-conversion mixer to downconvert
the FSK/GFSK or OOK/ASK modulated receive signal to a low IF frequency. Following a programmable gain
amplifier (PGA), the signal is converted to the digital domain by a high performance ?? ADC allowing filtering,
demodulation, slicing, and packet handling to be performed in the built-in digital modem, increasing the receiver ’s
performance and flexibility versus analog based architectures. The demodulated signal is output to the system
MCU through a programmable GPIO or via the standard SPI bus by reading the 64-byte Rx FIFO.
A single high-precision local oscillator (LO) is used for both transmit and receive modes since the transmitter and
receiver do not operate at the same time. The LO signal is generated by an integrated VCO and ?? Fractional-N
PLL synthesizer. The synthesizer is designed to support configurable data rates up to 500 kbps. The Si4455
operates in the frequency bands of 283–350, 425–525, and 850–960 MHz. The transmit FSK data is modulated
directly into the ?? data stream and can be shaped by a Gaussian low-pass filter to reduce unwanted spectral
content.
The Si4455 contains a power amplifier (PA) that supports output powers up to +13 dBm and is designed to support
single coin cell operation with current consumption of 18 mA for +10 dBm output power. The PA is single-ended to
allow for easy antenna matching and low BOM cost. The PA incorporates automatic ramp-up and ramp-down
control to reduce unwanted spectral spreading. Additional system features, such as 64-byte TX/RX FIFOs,
preamble detection, sync word detector, and CRC, reduce overall current consumption and allow for the use of
lower-cost system MCUs. Power-on-reset (POR) and GPIOs further reduce overall system cost and size. The
Si4455 is designed to work with an MCU, crystal, and a few passives to create a very compact and low-cost
system.
Rev 1.1
13
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